In a conventional phase current detection device for a three-phase PWM inverter device, a control period Tsw is varied in length in accordance with a phase command value θ* and a voltage command value V*. In a disclosed example (see PTL 1, for example), when a holding time (t1 or t2) of a switching mode corresponding to any basic voltage vector other than a zero vector, the basic voltage vector being determined in accordance with the phase command value θ* and the voltage command value V*, is longer than a sum (tdd+tsw) of a dead time tdd of an inverter main circuit and a time tsw required for current detection by a Hall CT 9, a fixed short control period Tsw is selected. When the holding time of the switching mode is shorter than the time (tdd+tsw), on the other hand, the control period Tsw is lengthened so that the holding time is longer than the time (tdd+tsw).